CENTER_EBR_CIB Bit Data

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
H
H
H
H
H
H
H
H
E
 
M
E
E
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
H
H
H
H
H
H
H
H
E
 
M
E
E

Mux driving 1200_N5_JECLKBRG0

Source F24B0
G_JECSOUT0_ECLKBRIDGECS 1

Mux driving 1200_N5_JECLKBRG1

Source F24B1
G_JECSOUT1_ECLKBRIDGECS 1

Mux driving 1200_S5_JECLKBRG0

Source F24B0
G_JECSOUT0_ECLKBRIDGECS 1

Mux driving 1200_S5_JECLKBRG1

Source F24B1
G_JECSOUT1_ECLKBRIDGECS 1

Mux driving 2000_N7_JECLKBRG0

Source F24B0
G_JECSOUT0_ECLKBRIDGECS 1

Mux driving 2000_N7_JECLKBRG1

Source F24B1
G_JECSOUT1_ECLKBRIDGECS 1

Mux driving 2000_S6_JECLKBRG0

Source F24B0
G_JECSOUT0_ECLKBRIDGECS 1

Mux driving 2000_S6_JECLKBRG1

Source F24B1
G_JECSOUT1_ECLKBRIDGECS 1

Mux driving G_EBRG0CLK1

Source F27B0 F28B0
G_JPCLKT21 1 -
G_JLPLLCLK1 - 1
G_ECLKCIBB1 1 1

Mux driving G_EBRG1CLK1

Source F27B1 F28B1
G_JPCLKT01 1 -
G_JLPLLCLK1 - 1
G_ECLKCIBT1 1 1

Mux driving L_HPSX0000

Source F23B0
G_VPRX0000 1

Mux driving L_HPSX0100

Source F22B0
G_VPRX0100 1

Mux driving L_HPSX0200

Source F21B0
G_VPRX0200 1

Mux driving L_HPSX0300

Source F20B0
G_VPRX0300 1

Mux driving L_HPSX0400

Source F19B0
G_VPRX0400 1

Mux driving L_HPSX0500

Source F18B0
G_VPRX0500 1

Mux driving L_HPSX0600

Source F17B0
G_VPRX0600 1

Mux driving L_HPSX0700

Source F16B0
G_VPRX0700 1

Mux driving R_HPSX0000

Source F23B1
G_VPRX0000 1

Mux driving R_HPSX0100

Source F22B1
G_VPRX0100 1

Mux driving R_HPSX0200

Source F21B1
G_VPRX0200 1

Mux driving R_HPSX0300

Source F20B1
G_VPRX0300 1

Mux driving R_HPSX0400

Source F19B1
G_VPRX0400 1

Mux driving R_HPSX0500

Source F18B1
G_VPRX0500 1

Mux driving R_HPSX0600

Source F17B1
G_VPRX0600 1

Mux driving R_HPSX0700

Source F16B1
G_VPRX0700 1

Configuration Setting ECLKBRIDGECS0.MODE

Default value: NONE

Value F26B0
NONE -
ECLKBRIDGECS 1

Configuration Setting ECLKBRIDGECS1.MODE

Default value: NONE

Value F26B1
NONE -
ECLKBRIDGECS 1

Fixed Connections

SourceSink
G_EBRG0CLK0 G_CLK0_0_ECLKBRIDGECS
G_EBRG1CLK0 G_CLK0_1_ECLKBRIDGECS
G_VPRXCLKI60 G_CLK0_6_DCM
G_VPRXCLKI70 G_CLK0_7_DCM
G_EBRG0CLK1 G_CLK1_0_ECLKBRIDGECS
G_EBRG1CLK1 G_CLK1_1_ECLKBRIDGECS
G_VPRXCLKI61 G_CLK1_6_DCM
G_VPRXCLKI71 G_CLK1_7_DCM
G_VPRXCLKI0 G_CLKI0_DCC
G_VPRXCLKI1 G_CLKI1_DCC
G_VPRXCLKI2 G_CLKI2_DCC
G_VPRXCLKI3 G_CLKI3_DCC
G_VPRXCLKI4 G_CLKI4_DCC
G_VPRXCLKI5 G_CLKI5_DCC
G_DCMOUT6_DCM G_CLKI6_DCC
G_DCMOUT7_DCM G_CLKI7_DCC
G_JLPLLCLK0 G_EBRG0CLK0
G_JLPLLCLK0 G_EBRG1CLK0
G_JECLKCIBB0 G_ECLKCIBB0
G_JECLKCIBB1 G_ECLKCIBB1
G_JECLKCIBT0 G_ECLKCIBT0
G_JECLKCIBT1 G_ECLKCIBT1
1200_S5_JCDIV10_CLKDIV G_JBCDIV10
2000_S6_JCDIV10_CLKDIV G_JBCDIV10
1200_S5_JCDIV11_CLKDIV G_JBCDIV11
2000_S6_JCDIV11_CLKDIV G_JBCDIV11
1200_S5_JCDIVX0_CLKDIV G_JBCDIVX0
2000_S6_JCDIVX0_CLKDIV G_JBCDIVX0
1200_S5_JCDIVX1_CLKDIV G_JBCDIVX1
2000_S6_JCDIVX1_CLKDIV G_JBCDIVX1
JA0 G_JCE0_DCC
JB0 G_JCE1_DCC
JC0 G_JCE2_DCC
JD0 G_JCE3_DCC
JA1 G_JCE4_DCC
JB1 G_JCE5_DCC
JC1 G_JCE6_DCC
JD1 G_JCE7_DCC
1200_S5_JCLK2 G_JECLKCIBB0
2000_S6_JCLK2 G_JECLKCIBB0
1200_S5_JCLK3 G_JECLKCIBB1
2000_S6_JCLK3 G_JECLKCIBB1
1200_N5_JCLK2 G_JECLKCIBT0
2000_N7_JCLK2 G_JECLKCIBT0
1200_N5_JCLK3 G_JECLKCIBT1
2000_N7_JCLK3 G_JECLKCIBT1
1200_N5W11_JCLKOP_PLL G_JLPLLCLK0
2000_N7W12_JCLKOP_PLL G_JLPLLCLK0
1200_N5W11_JCLKOS_PLL G_JLPLLCLK1
2000_N7W12_JCLKOS_PLL G_JLPLLCLK1
1200_N5W11_JCLKOS2_PLL G_JLPLLCLK2
2000_N7W12_JCLKOS2_PLL G_JLPLLCLK2
1200_N5W11_JCLKOS3_PLL G_JLPLLCLK3
2000_N7W12_JCLKOS3_PLL G_JLPLLCLK3
1200_W12_JCLK0 G_JPCLKCIBLLQ0
2000_W13_JCLK0 G_JPCLKCIBLLQ0
1200_W12_JCLK1 G_JPCLKCIBLLQ1
2000_W13_JCLK1 G_JPCLKCIBLLQ1
1200_E9_JCLK0 G_JPCLKCIBLRQ0
2000_E12_JCLK0 G_JPCLKCIBLRQ0
1200_E9_JCLK1 G_JPCLKCIBLRQ1
2000_E12_JCLK1 G_JPCLKCIBLRQ1
JCLK0 G_JPCLKCIBMID2
JCLK1 G_JPCLKCIBMID3
1200_S5_JCLK0 G_JPCLKCIBVIQB0
2000_S6_JCLK0 G_JPCLKCIBVIQB0
1200_S5_JCLK1 G_JPCLKCIBVIQB1
2000_S6_JCLK1 G_JPCLKCIBVIQB1
1200_N5_JCLK0 G_JPCLKCIBVIQT0
2000_N7_JCLK0 G_JPCLKCIBVIQT0
1200_N5_JCLK1 G_JPCLKCIBVIQT1
2000_N7_JCLK1 G_JPCLKCIBVIQT1
1200_N6_JINCK0 G_JPCLKT00
2000_N8_JINCK0 G_JPCLKT00
1200_N6_JINCK1 G_JPCLKT01
2000_N8_JINCK1 G_JPCLKT01
1200_E10_JINCK0 G_JPCLKT10
2000_E13_JINCK0 G_JPCLKT10
1200_S6_JINCK0 G_JPCLKT20
2000_S7_JINCK0 G_JPCLKT20
1200_S6_JINCK1 G_JPCLKT21
2000_S7_JINCK1 G_JPCLKT21
1200_W13_JINCK0 G_JPCLKT30
2000_W14_JINCK0 G_JPCLKT30
1200_W13_JINCK1 G_JPCLKT31
1200_W13_JINCK2 G_JPCLKT32
1200_W3_JA5 G_JSEL0_ECLKBRIDGECS
2000_W3_JA5 G_JSEL0_ECLKBRIDGECS
1200_W3_JB5 G_JSEL1_ECLKBRIDGECS
2000_W3_JB5 G_JSEL1_ECLKBRIDGECS
JA5 G_JSEL6_DCM
JB5 G_JSEL7_DCM
1200_S5_JA5 G_JSNETCIBB0
2000_S6_JA5 G_JSNETCIBB0
1200_S5_JB5 G_JSNETCIBB1
2000_S6_JB5 G_JSNETCIBB1
1200_W12_JA5 G_JSNETCIBL0
2000_W13_JA5 G_JSNETCIBL0
1200_W12_JB5 G_JSNETCIBL1
2000_W13_JB5 G_JSNETCIBL1
W1_JA5 G_JSNETCIBMID0
W1_JB5 G_JSNETCIBMID1
W1_JC5 G_JSNETCIBMID2
W1_JD5 G_JSNETCIBMID3
E1_JA5 G_JSNETCIBMID4
E1_JB5 G_JSNETCIBMID5
E1_JC5 G_JSNETCIBMID6
E1_JD5 G_JSNETCIBMID7
1200_E9_JA5 G_JSNETCIBR0
2000_E12_JA5 G_JSNETCIBR0
1200_E9_JB5 G_JSNETCIBR1
2000_E12_JB5 G_JSNETCIBR1
1200_N5_JA5 G_JSNETCIBT0
2000_N7_JA5 G_JSNETCIBT0
1200_N5_JB5 G_JSNETCIBT1
2000_N7_JB5 G_JSNETCIBT1
1200_N5_JCDIV10_CLKDIV G_JTCDIV10
2000_N7_JCDIV10_CLKDIV G_JTCDIV10
1200_N5_JCDIV11_CLKDIV G_JTCDIV11
2000_N7_JCDIV11_CLKDIV G_JTCDIV11
1200_N5_JCDIVX0_CLKDIV G_JTCDIVX0
2000_N7_JCDIVX0_CLKDIV G_JTCDIVX0
1200_N5_JCDIVX1_CLKDIV G_JTCDIVX1
2000_N7_JCDIVX1_CLKDIV G_JTCDIVX1
G_JPCLKCIBLLQ0 G_PCLKCIBLLQ0
G_JPCLKCIBLLQ1 G_PCLKCIBLLQ1
G_JPCLKCIBLRQ0 G_PCLKCIBLRQ0
G_JPCLKCIBLRQ1 G_PCLKCIBLRQ1
G_JPCLKCIBMID2 G_PCLKCIBMID2
G_JPCLKCIBMID3 G_PCLKCIBMID3
G_JPCLKCIBVIQB0 G_PCLKCIBVIQB0
G_JPCLKCIBVIQB1 G_PCLKCIBVIQB1
G_JPCLKCIBVIQT0 G_PCLKCIBVIQT0
G_JPCLKCIBVIQT1 G_PCLKCIBVIQT1
G_CLKO0_DCC G_VPRX0000
G_CLKO1_DCC G_VPRX0100
G_CLKO2_DCC G_VPRX0200
G_CLKO3_DCC G_VPRX0300
G_CLKO4_DCC G_VPRX0400
G_CLKO5_DCC G_VPRX0500
G_CLKO6_DCC G_VPRX0600
G_CLKO7_DCC G_VPRX0700